The United States-based Synopsys and Singapore’s Agency for Science, Technology and Research (A*STAR) will jointly develop advanced semiconductor-packaging and simulation technologies for artificial intelligence (AI) and high-performance computing.

In a statement on Wednesday, Synopsys said the two sides have signed a memorandum of understanding (MoU) for the move. The collaboration focuses on advanced packaging and chiplet-based designs that combine several smaller chips into one package, technologies seen as central to AI and next-generation electronics.

As chip packages grow more complex, digital modelling could assess a package’s likely performance and reliability before physical prototyping, saving time and cost, Synopsys highlighted.

The work will run through the A*STAR IME–Ansys Joint Innovation Consortium for Semiconductor Excellence, involving A*STAR’s Institute of Microelectronics and Ansys, now part of Synopsys. The consortium will serve as a platform for companies and researchers to conduct joint research on advanced System-in-Package technologies.

The initial phase will focus on mechanical design, modelling, and analysis. It aims to tackle issues such as package and wafer warping, thermo-mechanical stress, solder-joint reliability, and moisture-induced failures in multi-chiplet designs. The consortium will also explore projects with universities and offer technical training.

A*STAR IME will lead the consortium’s research, drawing on its packaging capabilities and research platforms, while Synopsys will provide trial licences to its Ansys simulation software to A*STAR IME and up to 10 member companies.

Terence Gan, executive director of A*STAR IME, said advanced packaging was becoming a critical differentiator in chip innovation as systems grew more complex and AI-driven. The collaboration can reinforce Singapore’s position as a semiconductor-innovation hub, the executive added.

Sukhwan Moon, Synopsys vice president of Asia-Pacific sales, said the collaboration can support local companies on reliability, performance and scalability, and to speed time-to-market for AI and HPC technologies.

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